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Author: Goran Dakov
Heptane CPU is a computer processor project, which is similar to both RISC architecture and VLIW processors such as Intel Itanium. It's a hybrid between super-scalar RISC and in-order VLIW architectures, which is closest to the not very widely known DISVLIW architecture. DISVLIW means that the operations are packed together in groups (like in VLIW processor), but are scheduled dynamically, by using hardware. This means it's possible to combine the advantages of both - high functional unit utilization and wide execution.
The Heptane CPU is being developed by one person only (Goran Dakov) in his spare time, but with hopes for commercial success in the future. The processor will have a very efficient software translator to AMD64 architecture due to support of similar memory addressing modes and the status flags are affected by operations in the same way.
The project author is planning to release an open-source version of the CPU parts of the firmware, including the translator, but there will also be non-open-source versions (although the firmware coding has not started, yet).
The Heptane processor is expected to have very high single-threaded performance, but not as low power consumption as ARM processors, so if used in a tablet computer, it will either be single-core or low frequency. For laptops dual-core should be fine.
- Project website - http://heptane.co.uk
- Kickstarter page - https://www.kickstarter.com/projects/678823173/heptane-high-performance-oss-friendly-cpu
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